multi-core targets and Segger J-Link
I was looking to try the multi-core functionality in 3.x, and tried using the provided "dual" examples in the Rowley-provided LPC-Link 2 (LPC4370 with one Cortex-M4 and two Cortex-M0) package.
I see from the README that the Segger J-Link isn't supported? This seems to be confirmed in my experimentation; with the Segger, the download ends with a cryptic error message. With an Amontec JTAGkey (FT2232), the example does download.
Has Segger crippled the J-Link to not work with two concurrent targets? Is there hope of Rowley Crossworks eventually supporting the Segger with multi-core targets, or has the Segger J-Link become a lost cause?
Thanks.
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Well, I do have similar case.
It is tricky, but you can actually debug two cores ( although not in convenient way and not at once).
I have LPC4330 with SPIFI flash. The code runs from flash and M4 boots M0. Then I am able to attach/detach to single target , either M4 or M0 ( without loading code by loader).
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Any news on when multiple cores will be supported on the J-Link? I've been using the crossconnect for ARM up till now but to be honest compared to a J-Link there is no contest, the J-Link (Pro) is orders of magnitude faster and a huge productivity boost. Since Segger actually sells Crossworks I don't understand why there still is no movement on this issue.
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I suppose the only way around this would be to run the second jlink.dll instance in a child process and communicate with it via some IPC mechanism. I appreciate this is a lot more work but I would vote to put this on the roadmap, especially since the crossconnect pro is no longer available.
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I wasn't able to get it to work with 2 crossstudio instances. I'm assuming there is a way though because in the manual for the J-Link Segger explicitly writes: "Multi-core debugging requires multiple debuggers or multiple instances of the same debugger. Two or more debuggers can use the same J-Link / J-Trace simultaneously."
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Bummer, I found this on the Segger forum:
http://forum.segger.com/index.php?page=Thread&threadID=2157
"multiple instances of GDB Server / multiple connections to J-Link are not supported on Linux / OS X and there is currently no specific schedule when this will be available."
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A simple experiment on the Embest/NXP LPC4357-EVB
Erasing ‘timer_interrupt.elf’ on CrossConnect for ARM
Erasing
Erasing 0.2 KB of .vectors addresses 1a000000 — 1a000113
Erasing 0.6 KB of .init addresses 1a000114 — 1a0003af
Erasing 0.6 KB of .text addresses 1a0003b0 — 1a000617
Erasing 215.0 KB of .rodata addresses 1a000618 — 1a036217
Erasing 0.0 KB of .data addresses 1a036218 — 1a03621b
Erasing completed in 683 ms — 324,632 bytes/sec
Erase successful
Downloading ‘timer_interrupt.elf’ to CrossConnect for ARM
Programming
Programming 0.2 KB of .vectors addresses 1a000000 — 1a000113
Programming 0.6 KB of .init addresses 1a000114 — 1a0003af
Programming 0.6 KB of .text addresses 1a0003b0 — 1a000617
Programming 215.0 KB of .rodata addresses 1a000618 — 1a036217
Programming 0.0 KB of .data addresses 1a036218 — 1a03621b
Programming completed in 2.8 s — 80,102 bytes/sec
Download successful
Verifying ‘timer_interrupt.elf’ on CrossConnect for ARM
Verifying
Verifying 0.2 KB of .vectors addresses 1a000000 — 1a000113
Verifying 0.6 KB of .init addresses 1a000114 — 1a0003af
Verifying 0.6 KB of .text addresses 1a0003b0 — 1a000617
Verifying 215.0 KB of .rodata addresses 1a000618 — 1a036217
Verifying 0.0 KB of .data addresses 1a036218 — 1a03621b
Verifying completed in 404 ms — 548,821 bytes/sec
Verify successful
Preparing target for user applicationand
Erasing ‘timer_interrupt.elf’ on SEGGER J-Link
Erasing
Erasing 0.2 KB of .vectors addresses 1a000000 — 1a000113
Erasing 0.6 KB of .init addresses 1a000114 — 1a0003af
Erasing 0.6 KB of .text addresses 1a0003b0 — 1a000617
Erasing 215.0 KB of .rodata addresses 1a000618 — 1a036217
Erasing 0.0 KB of .data addresses 1a036218 — 1a03621b
Erasing completed in 440 ms — 503,918 bytes/sec
Erase successful
Downloading ‘timer_interrupt.elf’ to SEGGER J-Link
Programming
Programming 0.2 KB of .vectors addresses 1a000000 — 1a000113
Programming 0.6 KB of .init addresses 1a000114 — 1a0003af
Programming 0.6 KB of .text addresses 1a0003b0 — 1a000617
Programming 215.0 KB of .rodata addresses 1a000618 — 1a036217
Programming 0.0 KB of .data addresses 1a036218 — 1a03621b
Programming completed in 1.2 s — 187,425 bytes/sec
Download successful
Verifying ‘timer_interrupt.elf’ on SEGGER J-Link
Verifying
Verifying 0.2 KB of .vectors addresses 1a000000 — 1a000113
Verifying 0.6 KB of .init addresses 1a000114 — 1a0003af
Verifying 0.6 KB of .text addresses 1a0003b0 — 1a000617
Verifying 215.0 KB of .rodata addresses 1a000618 — 1a036217
Verifying 0.0 KB of .data addresses 1a036218 — 1a03621b
Verifying completed in 243 ms — 912,444 bytes/sec
Verify successfulThe j-link (plus) is twice'ish the speed of the crossconnect classic - where do you get your order of magnitude difference from?
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HI Michael,
I admit my evaluation was very subjective and also I've not been using the J-Link much for this project as I like having the dual core capabilities offered by the crossconnect. For a more objective comparison here are my logs (this is on Mac OSX 10.11.1 and using a J-Link Pro over USB):
Crossconnect classic:
Preparing target for download
Loading target script file LPC4300_Target.js
Executing script Reset(4)
Downloading ‘Loader.elf’ to CrossConnect for ARM
Programming
Programming 3.2 KB of .load_section addresses 10000000 — 10000cdb
Programming completed in 507 ms — 6,493 bytes/sec
Download successful
Verifying ‘Loader.elf’ on CrossConnect for ARM
Verifying
Verifying 3.2 KB of .load_section addresses 10000000 — 10000cdb
Verifying completed in 224 ms — 14,696 bytes/sec
Verify successful
Erasing ‘M4_Gyrox.elf’ on CrossConnect for ARM
Erasing
Erasing 0.2 KB of .vectors addresses 1a000000 — 1a000113
Erasing 0.5 KB of .init addresses 1a000114 — 1a00033f
Erasing 99.2 KB of .text addresses 1a000340 — 1a01902f
Erasing 0.0 KB of .ctors addresses 1a019030 — 1a01907b
Erasing 22.0 KB of .rodata addresses 1a01907c — 1a01e8bf
Erasing 1.1 KB of .data addresses 1a01e8c0 — 1a01ed83
Erasing completed in 1.7 s — 75,562 bytes/sec
Erase successful
Downloading ‘M4_Gyrox.elf’ to CrossConnect for ARM
Programming
Programming 0.2 KB of .vectors addresses 1a000000 — 1a000113
Programming 0.5 KB of .init addresses 1a000114 — 1a00033f
Programming 99.2 KB of .text addresses 1a000340 — 1a01902f
Programming 0.0 KB of .ctors addresses 1a019030 — 1a01907b
Programming 22.0 KB of .rodata addresses 1a01907c — 1a01e8bf
Programming 1.1 KB of .data addresses 1a01e8c0 — 1a01ed83
Programming completed in 1.1 s — 117,416 bytes/sec
Download successful
Verifying ‘M4_Gyrox.elf’ on CrossConnect for ARM
Verifying
Verifying 0.2 KB of .vectors addresses 1a000000 — 1a000113
Verifying 0.5 KB of .init addresses 1a000114 — 1a00033f
Verifying 99.2 KB of .text addresses 1a000340 — 1a01902f
Verifying 0.0 KB of .ctors addresses 1a019030 — 1a01907b
Verifying 22.0 KB of .rodata addresses 1a01907c — 1a01e8bf
Verifying 1.1 KB of .data addresses 1a01e8c0 — 1a01ed83
Verifying completed in 949 ms — 133,129 bytes/sec
Verify successfulJ-Link Pro:
Preparing target for download
Loading target script file LPC4300_Target.js
Executing script Reset(4)
LPC18xx/43xx reset: Halting CPU before performing reset...
LPC18xx/43xx reset: Halted CPU before reset.
Configured reset type is not supported for this device. Changing reset type to type 0
Programming
Programming 0.2 KB of .vectors addresses 1a000000 — 1a000113
Programming 0.5 KB of .init addresses 1a000114 — 1a00033f
Programming 99.2 KB of .text addresses 1a000340 — 1a01902f
Programming 0.0 KB of .ctors addresses 1a019030 — 1a01907b
Programming 22.0 KB of .rodata addresses 1a01907c — 1a01e8bf
Programming 1.1 KB of .data addresses 1a01e8c0 — 1a01ed83
Compare
Compare completed in 300 ms
Erase
Erase completed in 139 ms
Program
Program completed in 158 ms
J-Link: Flash download: Flash programming performed for 1 range (8192 bytes)
Verify
Verify completed in 112 ms
J-Link: Flash download: Total time needed: 1.021s (Prepare: 0.074s, Compare: 0.261s, Erase: 0.128s, Program: 0.387s, Verify: 0.112s, Restore: 0.056s)
Verify completed in 273 ms
Verifying ‘M4_Gyrox.elf’ on SEGGER J-Link
Verifying
Verifying 0.2 KB of .vectors addresses 1a000000 — 1a000113
Verifying 0.5 KB of .init addresses 1a000114 — 1a00033f
Verifying 99.2 KB of .text addresses 1a000340 — 1a01902f
Verifying 0.0 KB of .ctors addresses 1a019030 — 1a01907b
Verifying 22.0 KB of .rodata addresses 1a01907c — 1a01e8bf
Verifying 1.1 KB of .data addresses 1a01e8c0 — 1a01ed83
Verifying completed in 731 ms — 172,831 bytes/sec
Verify successfulIf I'm reading this correctly the J-Link PRO took about 2s and the Crossconnect about 4.5s? So indeed the J-Link Pro is roughly twice as fast. But subjectively it sure does make a big difference (my programming style is such that I run often in between code changes). I'm guessing it's roughly similar to the discontinued Crossconnect PRO in performance. I have one of those as well but unfortunately it doesn't work reliably under OSX (it did under Windows when I tried, but I'm a OSX user). In fact I've found that on OSX many JTAG adapters are flaky, e.g. the LPC-Link 2 under CMSIS-DAP has very similar problems, which leads me to suspect there might still be a bug lurking in some shared USB code on OSX. In my experience so far the only ones that work flawlessly on OSX are the crossconnect classic and the ST-Link (I haven't tried the FTDI chip based ones though).
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The crossconnect pro numbers are closer to that of the j-link number I posted.
Erasing
Erasing 0.2 KB of .vectors addresses 1a000000 — 1a000113
Erasing 0.6 KB of .init addresses 1a000114 — 1a0003af
Erasing 0.6 KB of .text addresses 1a0003b0 — 1a000617
Erasing 215.0 KB of .rodata addresses 1a000618 — 1a036217
Erasing 0.0 KB of .data addresses 1a036218 — 1a03621b
Erasing completed in 447 ms — 496,026 bytes/sec
Erase successful
Downloading ‘timer_interrupt.elf’ to CrossConnect for ARM
Programming
Programming 0.2 KB of .vectors addresses 1a000000 — 1a000113
Programming 0.6 KB of .init addresses 1a000114 — 1a0003af
Programming 0.6 KB of .text addresses 1a0003b0 — 1a000617
Programming 215.0 KB of .rodata addresses 1a000618 — 1a036217
Programming 0.0 KB of .data addresses 1a036218 — 1a03621b
Programming completed in 914 ms — 242,586 bytes/sec
Download successful
Verifying ‘timer_interrupt.elf’ on CrossConnect for ARM
Verifying
Verifying 0.2 KB of .vectors addresses 1a000000 — 1a000113
Verifying 0.6 KB of .init addresses 1a000114 — 1a0003af
Verifying 0.6 KB of .text addresses 1a0003b0 — 1a000617
Verifying 215.0 KB of .rodata addresses 1a000618 — 1a036217
Verifying 0.0 KB of .data addresses 1a036218 — 1a03621b
Verifying completed in 284 ms — 780,718 bytes/sec
Verify successfulNote that your numbers are using the built-in j-link flash loader which may be avoiding programming memory that hasn't changed. You can get similar behaviour with crossconnect (and j-link sans built flash loader) if you set the Target Option | Enable Differential Download on the dropdown in the targets window.
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It seems Segger has implemented support for multiple processes on Linux and OSX, this is in their latest release notes (V5.10):
- DLL (Linux): Added support for multiple processes accessing the same J-Link.
- DLL (Mac OS X): Added support for multiple processes accessing the same J-Link.That should make it possible to support multi core debugging by running each debugger in a separate sub process.
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