Jlink Verify error on SiLabs EFM32 on ver 4.0 on Mac Mojave

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    Rod Gilchrist

    The problem is with Rowley Crossworks 4.3.

    It seems to be specific to EFM32GG series 1 CPU's. Doesn't happen on Series 0. Series 1 support is a recent addition to Rowley.

    The load seems to fail with some bits not correctly programmed. But if I erase the chip and program the image with Simplicity Commander, the verify step that is part of starting debug succeeds.

    This suggests it is a parameter to the JLink download. I've tried turning the clock speed down to 0.5 mHz and that does not change anything. Simplicity Commander runs at 15 mHz. The Rowley default is 4 mHz.

     

     

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