LPC43xx running from (external) SDRAM


1 comment

  • Avatar
    Bryan Audiffred

    I know this is old, but in the interest of posterity...you're missing more than section placement.   You also need to configure pins, clocks, and the EMC peripheral via the debugger.  I use a custom reset script for an SDRAM only build.  

    You probably want to think twice about running from SDRAM on this part.  Bus arbitration is almost non-existent as is cache.  There is a simply priority scheme per the manual.  A while(1) in your idle task will almost entirely consume the bus, blocking other transfers you'd want to occur, like ethernet DMA transfers.


    function SDRAMReset(core)
    TargetInterface.pokeWord(0xE000EDF0, 0xA05F0003); // set C_HALT and C_DEBUGEN in DHCSR

    // Bit 17 of CREG is reserved. No idea what they are doing here.
    TargetInterface.pokeWord(0x4004312C, TargetInterface.peekWord(0x4004312C)|(1<<17)); // Power up RNG
    // Configure memory map to point to SDRAM
    TargetInterface.pokeWord(0x40043100, 0x28000000); // set M4MEMMAP to SDRAM

    TargetInterface.pokeWord(0xE000EDFC, 0x1); // set VC_CORERESET in DEMCR
    // Chip ERRATA - this will not reset the peripherals as they should
    TargetInterface.pokeWord(0xE000ED0C, 0x05FA0004); // set SYSRESETREQ in AIRCR


    Comment actions Permalink

Please sign in to leave a comment.