Jump to addres memory

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    Gordon Scott

    As I understand it, the least significant bit of the address gets loaded into EPSR register 'T' bit and must be a one for the command to address to be executable. There are references to this in the ARM Cortex user guide.

    DUI0552A_cortex_m3_dgug.pdf (at the bottom of the web page:)

    http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552-

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