Best way to measure incoming pulse train period?

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    Opsound

    I just attempted this and for some reason my code doesn't return to the main loop after an interrupt occurs.  What could be going wrong?  I can see the captured value updating in debug, but the blinky I have running in the main loop (just a delay and toggling a bit) seems to halt.

    int main (void)
    {
        gpioInit();
        cpuInit();
        systickInit(SYSTICK_DELAY_10MS);
        
        // enable all clocks
        SCB_PDRUNCFG &= ~(SCB_PDRUNCFG_WDTOSC_MASK | SCB_PDRUNCFG_SYSOSC_MASK | SCB_PDRUNCFG_ADC_MASK);
        
        /* Initialize timer & interrupt to detect the duration of each cycle on the STOP signal */
        timer32B0Init();

        while (1)
        {        
            LED_DATA ^= (1<<LED_PIN);
            systickDelay(100);
        }

    }

     

    uint32_t timer32B0CapturedValue;

    void TIMER32_0_IRQHandler(void)
    {
        // clear the CAP0 interrupt
        TMR_TMR32B0IR &= ~TMR_TMR32B0IR_CR0;
        
        // reset CT32B0 (hmm use the reset function or manually load a 0 into the count register?)
        TMR_TMR32B0TC = 0;
        
        // record the captured value
        timer32B0CapturedValue = TMR_TMR32B0CR0;
    }

    // CT32B0 is for capturing the duration of the incoming STOP signal
    void timer32B0Init(void)
    {
        // enable the clock for CT32B0
        SCB_SYSAHBCLKCTRL |= SCB_SYSAHBCLKCTRL_CT32B0;
        
        // set CT32B0 CAP0 function for pin PIO1.5 and enable pull-up.
        IOCON_PIO1_5 &= ~IOCON_PIO1_5_FUNC_MASK;
        IOCON_PIO1_5 |= IOCON_PIO1_5_FUNC_CT32B0_CAP0;
        IOCON_PIO1_5 &= ~IOCON_PIO1_5_MODE_MASK;
        IOCON_PIO1_5 |= IOCON_PIO1_5_MODE_PULLUP;
        
        // set up the capture control register
        TMR_TMR32B0CCR = 0; // clear the register
        TMR_TMR32B0CCR |= TMR_TMR32B0CCR_CAP0RE_ENABLED; // capture on rising edge
        TMR_TMR32B0CCR |= TMR_TMR32B0CCR_CAP0I_ENABLED; // generate interrupt capture event
        
        // enable the NVIC interrupt
        NVIC_EnableIRQ(TIMER_32_0_IRQn);
        
        // start the counter  
        TMR_TMR32B0TCR = TMR_TMR32B0TCR_COUNTERENABLE_ENABLED;
    }

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    Darcy Williams

    Do these processors have a FIFO you can connect to the timer?

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    Opsound

    No, I don't think so.  Only the UART and SPI peripherals have FIFO afaik.

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    Darcy Williams

    Sorry, head-cold...  I meant to ask if these devices have DMAs

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    Opsound

    Nah, the LPC11xx series doesn't

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    Opsound

    D'oh!

    "Writing a logic one to the corresponding IR bit will
    reset the interrupt. Writing a zero has no effect."

    I was trying to write zero to the register to clear the interrupt.

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