GPNVM bit on Atmel SMA3U (Cortex M3) - How is it set?
First off, I'm learning the Cortex M3 (Atmel SAM3U) with the aid of CrossWorks and am working my way through the start up files. I see the Vectors (from the map file) are located at 0x80000; no problem there as this is where the program is located by the linker. Reading the SAM3U data sheet, the GPNVM bit 1 apparently must be set to boot from FLASH 0. This, I assume, is done by the programming (I am using the CrossConnect classic) driver (JTAG programs the EEFC?). Although this is automated via selections in the solution (RAM verses FLASH) I wanted to verify that the GPNVM bit 1 is set using CrossWoks. I found a post by an individual suggesting the target menu item "Show, Set or Clear the GPNVM bits (specific to an Atmel AT91SAM9 device)", yet I don't see this in the current IDE. I realize the SAM3U is a later product, and the IDE has changed, so I was wonder, where in the IDE can I view the status of the GPNVM bit and am I correct in my assumption that this bit is set when the device is programmed?
Thanks,
Dave
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So, one other possibility that I see (relocating the vector table during startup) is the NVIC VTOR table. However, seems to me that the VTOR is more for dynamically changing the vector table at run time than at start up. Hence, I am still hopeful that someone can provide some insight into what really happens from compiler to reset with respect to the vector table relocation from the base address to 0x80000.
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Sorry if this is sounding as if I am writing a blog. I'm Not, I'd like to receive input on topic. However, in the interest of others that may have the same question, I did find a good description of how OpenOCD handles this situation (see section 12.4.2 topic "Flash Driver: at91sam3") here: http://openocd.berlios.de/doc/html/Flash-Commands.html.
That said, (Keep in mind I'm not looking for Rowley proprietary information) I have to believe that the CrossWorks code that drives the programming tool (e.g. CrossConnect) does the equivalent to program GPNVM bit 0 a program time.
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Jon, that's the tip I needed. Sometimes the obvious eludes :) I still have yet to understand, where in the IDE the bit can be observed. Sorry, but as I am new to the architecture (and the IDE, I haven't quite hit upon the right register set. The post I mentioned orginally mentioned "...the target menu item "Show, Set or Clear the GPNVM bits (specific to an Atmel AT91SAM9 device..." but I don't see that for the SAM3U. Can you suggest where to look?
Thanks,
Dave
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Thanks for your help Jon. For the benefit of others that my have this same question, and based on your guidence Jon, I found that section 9.1.4 "Boot Strategies" of the SAM3U4 data sheet describes the functionality of the GPNVM bit with regards to relocating the vector table, and section 21.3.3.5 "GPNVM bit" describes the mackup of the EEFC register(s) and how to read the bits.
Dave
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